Monday, March 11, 2024

Measuring oblique ionograms using KiwiSDRs (1)

Oblique ionogram obtained from a KiwiSDR using GNSS timestamps

How it is done

The receive bandwidth of KiwiSDRs is limited to 12 kHz (20.25 kHz in 3 user channel configuration). In order to synchronously tune to a chirp sounder GNSS-based timestamps are used:
  • For the current GNSS timestamp T0 tune the KiwiSDR to the frequency on which the chirp is expected at a time T0+DT.
  • Record 10240 IQ samples, corresponding to 20 512-sample long buffers
  • Repeat
Timing diagram

In this way, the chirp is always seen at a specific offset. Note that the tuning frequencies are different for each different complete chirp sweep because the KiwiSDR sampling rate is not GNSS-disciplined (the GNSS timestamps are exact).

abs(IQ) vs. frequency

For a chirp rate of 100 kHz/s and sampling rate 12 kHz, the frequency steps are ~85.33 kHz and the group delay resolution is 25 km.

The time offset DT, which depends on the delay between issuing a frequency change command and its effect, is measured at the beginning. It depends on internal KiwiSDR delays and on the network delay. If the KiwiSDR is on a local network this delay is about 2 buffers long, for KiwiSDRs on the internet delays between 8 and 10 buffers were seen.  

Monday, January 1, 2024

KiwiSDR gets CIC compensating filters

In an upcoming update, KiwiSDR's will get proper CIC compensating filters.

How is down-conversion done in the KiwiSDR?

The ADC runs at 66.66666 MHz, and CIC filters are used to down-convert to either 12 or 20.25 kHz. I recommend reading the original paper by Hogenauer which explains how to choose the bit widths of each filter stage in an optimal way.

Down-conversion from 66.66666 MHz to 12kHz (20.25kHz) is done in two steps; for the 12 kHz mode a 1st CIC filter is used to decimate by a factor of 926 to ~72 kHz; this is followed by a 2nd CIC which decimates by a factor of 6 to ~12 kHz.

The problem with CIC filters

CIC filters are optimal in the sense that they do use only addition and subtraction, as opposed to generic FIR filters, and therefore can be efficiently implemented in an FPGA. However, they are not perfect: 
  • All signals outside the fundamental domain (+- 6kHz in this case, green dashed lines in the graph below) are mirrored/reflected into it.
  • The filter curve of CIC filters is not flat, i.e., there is filter roll-off.

CIC filter response.

Enter CIC compensating filters

Both of these issues are improved by using a CIC compensating filter: instead of using the 2nd CIC filter for down-sampling to 12kHz, it is replaced with another CIC filter which down-samples to 24kHz, followed by a low-pass FIR filter and a final 2:1 down-sampling. The FIR filter makes sure everything out of +-6kHz is suppressed and that the CIC filter roll-off is compensated for. See AN455 for details.

CIC compensating filter with 64 taps for the 12 kHz mode.

CIC compensating filter performance

Using the built-in KiwiSDR signal generator the performance of the CIC+CIC compensating filter can be measured:
  • Signal generator is set to sweep from 10 MHz to 10.012 MHz
  • IQ mode recording
  • Manual AGC
  • Any other CIC compensation used previously turned off

Left: waterfall diagram: time vs. frequency; right: blue - signal, red - background.

  • The residual CIC filter roll-off from the 1st CIC filter is < 0.2 dB (only the roll-off of the 2nd CIC filter is compensated for)
  • Mirror signals are smaller than approximately -50 dB